1. Field of the Invention
This invention relates to a reproduction amplifier circuit of a hard disk drive, and more particularly relates to a reproduction amplifier circuit of a hard disk drive having a MR (Magneto Resistive) head.
2. Description of Related Art
In the field of the head of the reproduction amplifier circuit of the hard disk drive (referred to as HDD hereinafter), the MR head having an MR element which utilizes resistance change depending on the magnitude of the magnetic field has mainly been used.
A conventional reproduction amplifier circuit of an HDD having a MR head is described herein under. FIG. 3 is a conventional circuit diagram of a reproduction amplifier circuit of an HDD having a MR head. This HDD reproduction amplifier circuit is a Voltage Bias Current Sensing type reproduction amplifier circuit in which a signal is taken out as a current while both end voltage of the MR is being fixed.
Because both face side and back side of a disc of an HDD are served for recording, two MR heads MR0 and MR1 are used for one disc. Because all the discs are recorded/reproduced by use of one circuit in the reading/writing amplifier, change-over switches S1 and S2 are provided for selecting an MR head.
When the MR head MR0 is selected, the switch S1 is connected to the terminal a side and switch S2 is connected to the terminal c side, an inverted input (xe2x88x92) of an operational amplifier Gm1 is connected to the MR0 and the output is connected to the base of a transistor Q2. In such a circuit as described herein above, the operational amplifier functions so that a voltage V1 generated in the internal is generated at the H0 terminal. A capacitor C1 is provided to remove the noise of the operational amplifier Gm1. When the resistance value of the MR0 changes in response to the change of magnetic field on the hard disk in this state, the change is transmitted to the resistor R1 as a current. The operational amplifier A1 amplifies the current corresponding to the change and sends it out to an output terminal V0. As described herein above, the MR head MR0 performs reproduction process.
In the case that the MR head MR1 is selected, the MR head MR1 performs reproduction processing in the same manner as described herein above. The switch S1 is connected to the terminal b and the switch 2 is connected to the terminal d, the inverted input (xe2x88x92) of the operational amplifier Gm1 is connected to the MR1 and the output is connected to the base of a transistor Q1. In such a circuit as described herein above, the operational amplifier Gm1 functions so that a voltage V1 generated in the internal is generated at the H1 terminal. When the resistance value of the MR1 changes in response to the change of magnetic field on the had disc in this state, the change is transmitted to the resistor R1 as a current. The operation amplifier A1 amplifies the current corresponding to the change and sends it out to the output terminal V0. As described herein above, the MR head MR1 performs reproduction process.
The switches S1 and S2 are switched simultaneously usually. By switching the switches S1 and S2 simultaneously, when, for example, a switching signal of the head is changed from the MR0 to MR1, the switches S1 and S2 are switched and V1 is generated at the H1 terminal of the MR1.
The conventional reproduction amplifier circuit of an HDD having an MR head described herein above is disadvantageous in that an overvoltage is applied to the MR head when the MR head is switched.
In switching of the MR head, for example, when the MR head MR0 is switched to the MR head MR1, an MR head switching signal is transmitted simultaneously to the switch S1 and switch S2, but parasitic capacitance and wiring resistance cause a switching lag between these switches S1 and S2.
FIG. 4 is a timing chart of a conventional reproduction amplifier circuit of an HDD having an MR head. The operation performed when the switch S1 is switched with a delay of the time t3 from the switch S2 is described. When the switching signal of the head changes from the H0 terminal to the H1 terminal, first the switch S2 is switched from the terminal c to the terminal d. During the time t3 until the switch S1 is switched, the voltage of the H1 terminal namely the GND voltage value is connected to the inverted input (xe2x88x92) of the operational amplifier Gm1, and the operational amplifier Gm1 functions to increase the voltage at the A point. During the time, the voltage generated at the H1 terminal is remained in GND. The switch S1 is switched from the terminal a to the terminal b with the delay of the time t3. At the time when the switch S1 is switched, the voltage increased by the operational amplifier Gm1 as described herein above is applied to the H1 terminal. After that time, the operational amplifier Gm1 functions to adjust the voltage of the H1 terminal to V1, and the voltage of the H1 terminal decreases gradually to V1 and this state is maintained. As described herein above, when the switch S1 delays from the switch S2, an overvoltage is applied to the MR head MR1, this is a problem.
The case in which the switch S2 delays from the switch S1 by the time t3 will be described herein under. When the switch S1 is switched, a voltage V1 is generated at the H1 terminal of the MR1. During the time t3 until the time t3 elapses, the switch S2 is not switched, and the H0 terminal which is now going to decrease to GND is connected to the inverted input (xe2x88x92) of the operational amplifier Gm1. Because a voltage which is lower than the non-inverted input terminal (+) is applied to the inverted input (xe2x88x92) of the operational amplifier Gm1 as described herein above, the operational amplifier Gm1 functions to increase the voltage at the A point similarly to the case that the switch S1 is switched with a delay as described herein above. As the result, an overvoltage is applied to the MR head MR1 also when the switch S2 delays from the switch S1.
As described herein above, regardless of the switch that is first switched, when switching causes a lag between the switches S1 and S2, an overvoltage is applied to the MR head to cause the reduction of the reliability of the MR head.
The present invention was accomplished to solve such problem. It is the object of the present invention to provide a reproduction amplifier circuit of a hard disk drive in which an overvoltage is not applied to a head when the head is switched.
To solve the above-mentioned problem, the present invention provides a reproduction amplifier circuit of a hard disk drive for reproducing the information recorded in the predetermined disc area by use of two MR (Magneto Resistive) heads comprising an MR head switching means for performing switching of the MR head connected to a negative feedback circuit for applying a predetermined voltage on the MR head in response to a head switching signal, first switching means for turning off the operation of an amplifier which forms the negative feedback circuit for a predetermined time, a current source for discharging a capacitor provided on the middle of the negative feedback circuit, and second switching means for turning on the connection between the current source and the capacitor in response to the off operation of the first switching means.
The reproduction amplifier circuit of the hard disk drive having the structure as described herein above fixes both end voltage of the MR head by means of the negative feedback circuit, and reads out (reproduces) the disc by means of the change in resistance value of the MR head depending on the change in magnetic field on the disc. The MR head switching means switches the MR head comprising two heads per one disc, and reproduces a desired disc area. Before the MR head is switched by means of the MR head switching means, the operation of the operational amplifier which forms the negative feedback circuit is turned off by use of the first switching means, and the function of the negative feedback circuit is inactivated until the switching of the MR head is completed. At that time, the second switching means connects the capacitor to the current source, and the capacitor is thereby discharged. Subsequently, the MR head is switched by the MR head switching means, the state of the first switching means and the second switching means is restored to the original state, and the operation of the negative feedback circuit is activated again.